New Hardware Git

Verilog/ez1/ez.vcd

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+$date
+	Thu May 29 14:49:58 2025
+$end
+$version
+	Icarus Verilog
+$end
+$timescale
+	1ns
+$end
+$scope module test $end
+$var wire 1 ! c $end
+$var reg 1 " a $end
+$var reg 1 # b $end
+$scope module nnt $end
+$var wire 1 " a $end
+$var wire 1 # b $end
+$var wire 1 ! c $end
+$upscope $end
+$upscope $end
+$enddefinitions $end
+$comment Show the parameter values. $end
+$dumpall
+$end
+#0
+$dumpvars
+x#
+x"
+x!
+$end
+#100
+0!
+0#
+0"
+#300
+1!
+1#
+#500
+0#
+1"
+#700
+1#
+#800