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e2hang
2025-12-31 19:35:06 +08:00
commit aca5a8aab8
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Verilog/test/test_out Normal file
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#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "D:\iverilog\lib\ivl\system.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "D:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "D:\iverilog\lib\ivl\va_math.vpi";
S_00000278ad31bcf0 .scope module, "pwm_tb" "pwm_tb" 2 1;
.timescale 0 0;
v00000278ad366be0_0 .var "clk", 0 0;
v00000278ad3640f0_0 .var "duty", 7 0;
v00000278ad364190_0 .net "pwm_out", 0 0, v00000278ad366aa0_0; 1 drivers
v00000278ad364230_0 .var "rst", 0 0;
S_00000278ad366870 .scope module, "uut" "pwm" 2 9, 3 1 0, S_00000278ad31bcf0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "rst";
.port_info 2 /INPUT 8 "duty";
.port_info 3 /OUTPUT 1 "pwm_out";
v00000278ad31be80_0 .net "clk", 0 0, v00000278ad366be0_0; 1 drivers
v00000278ad332ae0_0 .var "counter", 7 0;
v00000278ad366a00_0 .net "duty", 7 0, v00000278ad3640f0_0; 1 drivers
v00000278ad366aa0_0 .var "pwm_out", 0 0;
v00000278ad366b40_0 .net "rst", 0 0, v00000278ad364230_0; 1 drivers
E_00000278ad319850 .event posedge, v00000278ad366b40_0, v00000278ad31be80_0;
.scope S_00000278ad366870;
T_0 ;
%pushi/vec4 0, 0, 8;
%store/vec4 v00000278ad332ae0_0, 0, 8;
%end;
.thread T_0;
.scope S_00000278ad366870;
T_1 ;
%wait E_00000278ad319850;
%load/vec4 v00000278ad366b40_0;
%flag_set/vec4 8;
%jmp/0xz T_1.0, 8;
%pushi/vec4 0, 0, 8;
%assign/vec4 v00000278ad332ae0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000278ad366aa0_0, 0;
%jmp T_1.1;
T_1.0 ;
%load/vec4 v00000278ad332ae0_0;
%addi 1, 0, 8;
%assign/vec4 v00000278ad332ae0_0, 0;
%load/vec4 v00000278ad332ae0_0;
%load/vec4 v00000278ad366a00_0;
%cmp/u;
%jmp/0xz T_1.2, 5;
%pushi/vec4 1, 0, 1;
%assign/vec4 v00000278ad366aa0_0, 0;
%jmp T_1.3;
T_1.2 ;
%pushi/vec4 0, 0, 1;
%assign/vec4 v00000278ad366aa0_0, 0;
T_1.3 ;
T_1.1 ;
%jmp T_1;
.thread T_1;
.scope S_00000278ad31bcf0;
T_2 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000278ad366be0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000278ad364230_0, 0, 1;
%pushi/vec4 128, 0, 8;
%store/vec4 v00000278ad3640f0_0, 0, 8;
%end;
.thread T_2;
.scope S_00000278ad31bcf0;
T_3 ;
%delay 10, 0;
%load/vec4 v00000278ad366be0_0;
%inv;
%store/vec4 v00000278ad366be0_0, 0, 1;
%jmp T_3;
.thread T_3;
.scope S_00000278ad31bcf0;
T_4 ;
%vpi_call 2 21 "$dumpfile", "wave.vcd" {0 0 0};
%vpi_call 2 22 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000278ad31bcf0 {0 0 0};
%pushi/vec4 1, 0, 1;
%store/vec4 v00000278ad364230_0, 0, 1;
%delay 20, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000278ad364230_0, 0, 1;
%delay 1000, 0;
%pushi/vec4 64, 0, 8;
%store/vec4 v00000278ad3640f0_0, 0, 8;
%delay 1000, 0;
%pushi/vec4 192, 0, 8;
%store/vec4 v00000278ad3640f0_0, 0, 8;
%delay 1000, 0;
%vpi_call 2 33 "$finish" {0 0 0};
%end;
.thread T_4;
# The file index is used to find the file name in the following table.
:file_names 4;
"N/A";
"<interactive>";
"test_tb.v";
"test.v";